The present invention relates generally to MOS RESURF super-junction devices.
FIG. 1 illustrates a conventional vertical power MOSFET. The device 1 consists of an N+ substrate 3 on which an epitaxial Nxe2x88x92 layer defining a drift region 5 has been grown. In the particular device shown, the source regions 7, each of which consists of a P+ layer 9 equipped with N+ implant regions 11, are separated by a trench 13. The trench is lined with a gate oxide 15 over which is disposed a gate metallization layer 17. Each source region is likewise equipped with a source metallization layer 19, and the N+ substrate is equipped with a drain metallization layer 21.
It is generally desirable in a power MOSFET device of the type shown in FIG. 1 to achieve both a high breakdown voltage (BV) and a low on-resistance (RON). However, both of these parameters depend on the thickness and resistivity of the drift region in such a way that both the breakdown voltage and the RON of a power MOSFET device will increase as the dopant concentration in the drift region is decreased and/or the thickness of the drift region is increased. There is thus a trade-off in power MOSFETs between breakdown voltage and RON.
One way of reducing the specific on-resistance of a power MOSFET device without compromising the desired high breakdown voltage is through Reduced Surface Field (RESURF) technology. In a RESURF device, such as the RESURF lateral MOSFET 120 shown in FIG. 12, an additional layer 132 (additional to 10 alone) of silicon doped with P- type impurities is provided underneath the N- drift region 114 of the device (the polarities would be reversed for a device having a P- drift region). This additional layer 132 is the RESURF region. The RESURF MOSFET 120 can have the same breakdown voltage as, and a lower specific on-resistance than, the simple MOSFET 110 due to the extra depletion of electrons that occurs from the drift region of the RESURF MOSFET when the device is in its off state. This extra depletion occurs as a result of the interaction of the drift region 114 with the RESURF region 132, in addition to the normal depletion that occurs as a result of the interaction of the drift region and the source region 112.
The extra depletion within the RESURF MOSFET 120 reduces the maximum electric field that occurs at any point within the drift region. Specifically, given the application of the same voltage between the drain region 116 and source region 112 of the RESURF MOSFET 120 as assumed with respect to the simple MOSFET 110 (where both MOSFETs have drift regions of equal dimensions), the resulting electric field within the drift region 114 is lower at the junction 118 for the RESURF MOSFET than for the simple MOSFET. With the addition of the RESURF region 132 to the simple MOSFET to create the RESURF MOSFET 120, therefore, a greater voltage must be applied between the drain region 116 and source region 112 of the MOSFET to produce a maximum electric field that exceeds the critical level above which breakdown occurs than for the simple MOSFET 110. Consequently, a RESURF MOSFET can have a smaller drift region 114, both in terms of the length of the drift region between the drain region 116 and source region 112 and in terms of the depth or thickness of the drift region, or a higher doping level than a comparable simple MOSFET having the same breakdown voltage. Since, as noted above, the RON of a power MOSFET device will increase as the dopant concentration in the drift region is decreased and/or the thickness of the drift region is increased, this means that a RESURF MOSFET can have a lower RON than a comparable simple MOSFET having the same breakdown voltage.
Super-junction RESURF technology has now evolved as a means to even further improve the breakdown voltage versus RON trade-off in vertical power MOSFETS. One example of a conventional super-junction RESURF device is illustrated in FIG. 2. This device 31 is similar in many respects to the device depicted in FIG. 1, the principle difference (aside from the fact that the device of FIG. 2 is a vertical device) being that, while the device of FIG. 1 has a homogeneous drift region, the drift region 33 of the power device of FIG. 2 is divided into a plurality of Nxe2x88x92 regions 35 which alternate with Pxe2x88x92 regions 37. Such an arrangement allows for the doping concentration of the N+41 and P+35 regions to be increased significantly without compromising the breakdown voltage. Accordingly, this arrangement results in a significant reduction in RON for a given breakdown voltage, hence greatly improving the breakdown voltage versus RON trade-off.
Although the device depicted in FIG. 2 is advantageous in terms of the breakdown voltage versus RON trade-off that it affords, this type of device is inherently difficult to manufacture on a commercial scale, a fact that has hindered the commercial deployment of RESURF super-junction technology. In particular, in order to realize the full potential of these devices, the vertically oriented Nxe2x88x92/Pxe2x88x92 stripes or regions need to be very narrow and deep and accurately aligned, a result that is very difficult to accomplish with a single epitaxial layer growth and implantation cycle. Consequently, most experimental embodiments reported to date have been fabricated through multiple epitaxial and high-energy implantation steps. However, the use of such multiple processing steps greatly increases the process complexity and places very high demands on feature alignment at each step. Moreover, since there are several steps involved in this type of approach, and since a defect in any of the vertically oriented drift regions will result in a defective device, the product yield afforded by this type of approach is very low.
There is thus a need in the art for a MOS RESURF super-junction device, and a method for making the same, in which alignment dependence is minimized or eliminated, and in which process complexity is reduced. There is also a need in the art for a method for making a MOS RESURF device that affords a high product yield. These and other needs are provided by the devices and methodologies disclosed herein, as hereinafter described.
In one aspect, a RESURF super-junction device is provided herein which comprises a plurality of electrodes disposed in a layer of a first material having a first conductivity type. Each of the plurality of electrodes contains a second material of a second conductivity type which is encased or encapsulated in a dielectric material.
In another aspect, a RESURF super-junction device is provided herein which comprises an alternating sequence of first and second regions, wherein each of the first regions comprises a material having a first conductivity type, wherein each of the second regions comprises a trench containing a material having a second conductivity type which is separated from the first material by a dielectric layer, and wherein the first regions collectively define the drift region of the device.
In still another aspect, a RESURF super-junction device is provided herein which comprises a P+ region, an N+ region, and a drift region comprising a plurality of Nxe2x88x92 regions, wherein any two of said plurality of Nxe2x88x92 regions have at least one polysilicon/oxide trench disposed between them.
In yet another aspect, a method is provided herein for making a RESURF super-junction device. In accordance with the method, a substrate is provided which has a first conductivity type. A plurality of trenches are created in the substrate, as, for example, through masking and etching steps, and a dielectric layer is deposited onto the interior surface of each trench. A material of a second conductivity type is then deposited over the dielectric layer.
In the above noted aspects, the devices may be vertical or lateral devices or MOSFETs. The regions of first and second conductivity type may be p-conductors or nconductors. The electrode or trench regions may utilize various conductive materials, including doped or undoped polysilicon and various metals, and may also utilize various dielectric materials, such as silicon oxide or silicon nitride. These devices may also include one or more source and body regions, which are preferably disposed over or adjacent to the trench regions or electrodes.